Location:
Search - show image fpga
Search list
Description: 通过UART从PC主机读取图片数据，并完成图片在VGA显示器上的显示-through UART from the host PC to read image data, and complete picture of the VGA display on the show
Platform: |
Size: 681984 |
Author: 萧飒 |
Hits:
Description: 提出了基于嵌入式技术CCD 采集系统的新方法,并以ARM微处理器和FPGA 芯片为核心设计了嵌入式CCD 采集系统,解决了传统采集方法中系统过于庞大和复杂的问题,具有结构简单、小型化和智能化的特点。试验结果表明,该系统实现了CCD 输出图像的高速采集和实时显示,数据采集速率达到5 MHz。-Embedded technology based on CCD acquisition system A new method, and ARM microprocessors and FPGA chip is designed as the core embedded CCD acquisition system to address the traditional acquisition methods in the system too large and complex problems, is simple in structure, small and intelligent features. Experimental results show that the system realizes high-speed CCD output image acquisition and real-time display, data acquisition rate up to 5 MHz.
Platform: |
Size: 333824 |
Author: 陈天葆 |
Hits:
Description: VGA彩色信号控制器设计：用VHDL语言编写程序，重点完成三个功能：
1.棋盘格图案显示：
用三基色原理在CRT显示器上显示由横竖八彩条重叠构成的棋盘格图案；
2.在显示器上依次显示0~9十个数字：
每个数字不同颜色，每个显示大约0.4秒，循环显示；
3.显示动画效果：
将静态图像以高频率显示，造成动画效果，最终动态显示OVER结束。-VGA color signal controller design: using VHDL programming language, focusing on the completion of three functions: 1. Chessboard grid pattern shows that: The principle of three-color display on the CRT display by eight color横竖overlapping grid consisting of checkerboard patterns 2. followed by the display on display 0 ~ 9 10 figure: Each figure in different colors, each show around 0.4 seconds, circular display 3. show animation effects: static image to display a high frequency, resulting in animation effects, dynamic display finally OVER The End .
Platform: |
Size: 186368 |
Author: 刘峰 |
Hits:
Description: Based on the information processing functionalities of spiking neurons, a spiking neural network model is proposed to extract features from a visual image. The network is constructed with a conductance-based integrate-and-fire neuron model and a set of specific receptive fields. The properties of the network are detailed in this paper. Simulation results show that the network is able to perform image feature extraction within a time interval of 100 ms. This processing time is consistent with the human visual system. The demonstrations show how the network can extract right-angle contours in a visual image. Based on this principle, many other image features can be extracted by analogy. The parallel processing mechanism of this network model is very promising for a hardware implementation based on VLSI or FPGA technology.
Platform: |
Size: 288768 |
Author: sacoura31 |
Hits:
Description: 基于FPGA的实验。使用FPGA直接控制TFT彩屏，达到显示彩条的效果。使用FPGA连接TFT控制器，使显示一组汉字或一幅图像。
-FPGA-based experiment. FPGA to directly control the use of TFT color display to show the effect of color. TFT controller using FPGA connected to a group of Chinese characters displayed or an image.
Platform: |
Size: 1024 |
Author: 贺欧 |
Hits:
Description: 本文论述并设计实现了一个脱机自由手写体数字识别系统。文中首先对待识别数字的预处理进行了介绍，包括二值化、平滑滤波、规范化、细化等图像处理方法；其次，探讨了如何提取数字字符的结构特征和笔划特征，并详细地描述了知识库的构造方法；最后采用了以知识库为基础的模板匹配识别方法,并以MATLAB作为编程工具实现了具有友好的图形用户界面的自由手写体数字识别系统。实验结果表明，本方法具有较高的识别率，并具有较好的抗噪性能。-In this paper, designed and implemented an off-line handwritten numeral recognition system. The paper first pre-treatment identification numbers were introduced, including binarization, smoothing filter, normalization, thinning and other image processing methods secondly, to explore how to extract the number of characters in the structural characteristics and stroke features, and described in detail Knowledge of construction methods finally adopted in order to Knowledge-based template matching recognition method, and to MATLAB as a programming tool to achieve a friendly graphical user interface handwritten numeral recognition system. The experimental results show that this method has higher recognition rate, and has good anti-noise performance.
Platform: |
Size: 350208 |
Author: zhangying |
Hits:
Description: 本文设计的是基于大规模FPGA的BMP图库管理，完成了数码相框的一部分功能。并且本文详细地介绍了BMP图库管理的软硬件实现，即采用Altera的CyclonII系列EP2C20F484C7作为主控芯片，内嵌32位的NiosII软核，采用SDRAM作为内存，把存储在SD卡内的二进制图片信息读入内存，并控制TFT彩色液晶，读取图片数据送到液晶上显示。整个过程的所有设备都是通过Avalon总线挂在NiosII上，在NiosII的协调下正常工作。
本作品最终能显示存入SD卡内的彩色图片信息，图片显示很流畅，没有延时。并且能通过4个按键分别完成图片的上翻、下翻、放大和缩小。-This design is based on the large-scale FPGA-BMP library management, and completed part of the features of digital photo frame. This paper describes the library management software and hardware to achieve BMP photos, that used the Altera s CyclonII series EP2C20F484C7 as the master chip, embedded soft-core 32-bit NiosII, the use of SDRAM for memory, SD card stored the binary picture information read into memory, and control TFT color LCD, read the image form the memory data to the LCD display. All equipment of the process hanging in the NiosII through Avalon bus, with the NiosII CPU and complete the coordination of work.
Eventually the work can show the color pictures of information stored into the SD card, pictures show smoothly, and with no delay. And with 4 keys, respectively, we can make the TFT display the previous image or the next image,and make the pictures zoom in or zoom out.
Platform: |
Size: 2168832 |
Author: wuwei |
Hits:
Description: 本文设计的是基于大规模FPGA的BMP图库管理，完成了数码相框的一部分功能。并且本文详细地介绍了BMP图库管理的软硬件实现，即采用Altera的CyclonII系列EP2C20F484C7作为主控芯片，内嵌32位的NiosII软核，采用SDRAM作为内存，把存储在SD卡内的二进制图片信息读入内存，并控制TFT彩色液晶，读取图片数据送到液晶上显示。整个过程的所有设备都是通过Avalon总线挂在NiosII上，在NiosII的协调下正常工作。
本作品最终能显示存入SD卡内的彩色图片信息，图片显示很流畅，没有延时。并且能通过4个按键分别完成图片的上翻、下翻、放大和缩小。-This design is based on the large-scale FPGA-BMP library management, and completed part of the features of digital photo frame. This paper describes the library management software and hardware to achieve BMP photos, that used the Altera s CyclonII series EP2C20F484C7 as the master chip, embedded soft-core 32-bit NiosII, the use of SDRAM for memory, SD card stored the binary picture information read into memory, and control TFT color LCD, read the image form the memory data to the LCD display. All equipment of the process hanging in the NiosII through Avalon bus, with the NiosII CPU and complete the coordination of work.
Eventually the work can show the color pictures of information stored into the SD card, pictures show smoothly, and with no delay. And with 4 keys, respectively, we can make the TFT display the previous image or the next image,and make the pictures zoom in or zoom out.
Platform: |
Size: 11721728 |
Author: wuwei |
Hits:
Description: 为满足某捷联导引头上图像辅助末制导系统的需要,设计了以高速浮点DSP芯片TMS320C6711D和现场可编程门阵列FPGA为核心的高性能图像匹配处理平台。文中详述了该系统的软、硬件设计以及各模块的组成和功能,最后通过软硬件联合测试表明,该系统可完全满足图像导引头上处理速度快、存储容量大、实时性强的要求,并具有小型化、低成本和集成度高的优点。 更多还原-In order to meet the demands of image-aided terminal guidance system,a high-performance scene-matching system based on TMS320C6711D and FPGA is designed.The overall hardware and software design and the composition of all function modules are described.Experiment results show that the scheme can totally meet the demands of high-speed,large storage and real-time performance of the strapdown seeker,and also has the merits of small volume,low cost and nice stability. 更多还原
Platform: |
Size: 513024 |
Author: mabeibei |
Hits:
Description: 在该算法的FPGA实现过程中，充分利用FPGA硬件的并行性，并且采用流水线技术，提高了图像滤波的处理速度。FPGA硬件实现的结果表明，该算法与传统的快速滤波算法相比，不仅能够满足图像处理的实时性要求，而且还能在滤除图像椒盐噪声的同时，避免滤波后图像变得模糊的缺陷，达到了保护原始图像细节的目的。-In the implemention of this algorithm on FPGA,we can make full use of the property of hardware parallelism and adopt the pipelining technology to abtain the purpose of improving image processing speed.The implementation results of this alorithm on FPGA hardware show that,this algorithm not only meets the requirements of real-time image processing,but also avoids the flaw of image burring in filtering the salt and pepper noise and achieves the purpose of preserving image details,compared with the traditional fast median filtering algorithm.
Platform: |
Size: 2447360 |
Author: Rokey_Niu |
Hits:
Description: 设计了一种基于TMS320C6455与FPGA 的实时图像跟踪系统，该系统首先采用MAX9526 采集图像，利用FPGA 对图像进行均值滤波，滤波后数据采用乒乓方式传输给DSP。Mean Shift 跟踪算法采用图像像素灰度距离中心点的距离作
为目标特征建立核函数，实现对目标的实时跟踪。实验表明，该系统具有良好的实时性与稳定性。-Designed a real-time image-based tracking system TMS320C6455 and FPGA, the system first uses MAX9526 capture images, the use of FPGA mean the image filtering, the filtered data is transmitted ping-pong approach to DSP. Mean Shift tracking algorithm uses the distance from the center of the image pixel gray as the target feature to build a nuclear function, to achieve the goal of real-time tracking. Experiments show that the system has good real-time performance and stability.
Platform: |
Size: 1670144 |
Author: rambolyb |
Hits:
Description: fpga里ddr数据按一定规格显示为图像-show the data of dddr as a image using matlab
Platform: |
Size: 2048 |
Author: 孙涛 |
Hits: